One aspect of semiconductor manufacturing is to identify all pattern defects on both the mask and the wafer to ensure adequate yield of advanced devices. Historically, Focus-Exposure Matrices (FEM) and Process Window Qualification (PWQ) have been processes used to identify defects on the wafer after the mask has been created and inspected. However, the defects identified were limited to systematic pattern defects.
Systematic pattern defects generally occur at a given location, and are primarily due to a weakness of the designed pattern or due to the quality of optical proximity correction (OPC) or sub-resolution assist feature (SRAF) implementations. Thus, the above mentioned processes worked reasonably well to identify pattern defects, until extreme ultraviolet lithography (EUV) was introduced.
Due to the low photon density of EUV, shot noise effects lead to uncertainty of being able to print patterns reliably and therefore even a same pattern may fail at different locations under identical exposure conditions. For example, even with a same Optical Proximity Correction (OPC) and Sub-Resolution Assist Features (SRAFs), a same pattern may print correctly at one location on the wafer while another location may fail. Location of a failure within a given pattern may vary, which is known as a stochastic effect, and identifying these stochastic defects is more challenging with the prior processes used to identify systematic defects. Though we may be able to discover patterns of interest with the prior processes there are risks due to location accuracy and this stochastic nature will lead to mis-classification and under sampling of such issues.
Accordingly, new processes in pattern grouping and sampling are needed, as well as new processes for identifying systematic defects, particularly since defect inspection plays a key role in yield management of semiconductor wafer processing for integrated circuit (IC) manufacturing. This would similarly be the case for other components fabricated using EUV.
There is thus a need for addressing these and/or other issues associated with the prior art techniques used for identifying pattern defects on fabricated components.